汇编源代码说明
;===============================================================================
; 引用头文件
;===============================================================================
get bdinit.h
;===============================================================================
; 引用标准变量
;===============================================================================
| IMPORT | |Image$$RO$$Base| | ; Base address of RO section |
| IMPORT | |Image$$RO$$Limit| | ; End address of RO section |
| IMPORT | |Image$$RW$$Base| | ; Base address of RW section |
| IMPORT | |Image$$RW$$Limit| | ; End address of RW section |
| IMPORT | |Image$$ZI$$Base| | ; Base address of ZI section |
| IMPORT | |Image$$ZI$$Limit| | ; End addresss of ZI section |
IMPORT bdmain ; The entry function of C program
;===============================================================================
; 宏定义
;===============================================================================
; macro HANDLER
MACRO
$HandlerLabel HANDLER $HandleLabel
$HandlerLabel
sub sp,sp,#4 ;Decrement sp (to store jump address) stmfd sp!,{r0} ;PUSH the work register to stack
ldr r0,=$HandleLabel;Load the address of HandleXXX to r0
ldr r0,[r0] ;Load the contents(service routine start address) of HandleXXX str r0,[sp,#4] ;Store the contents(ISR) of HandleXXX to stack
ldmfd sp!,{r0,pc} ;POP the work register and pc(jump to ISR) MEND
;===============================================================================
; 汇编语言的入口代码
;===============================================================================
AREA Init,CODE,READONLY CODE32
ENTRY
;=====================
; 建立中断向量表
;=====================
| b | reset_handler | ;0x00000000: | Reset (SVC) |
| b | undef_handler | ;0x00000004: | Undefined instruction (Undef) |
| b | swi_handler | ;0x00000008: | Software Interrupt (SVC) |
| b | iabr_handler | ;0x0000000C: | Instruction Abort (Abort) |
| b | dabr_handler | ;0x00000010: | Data Abort (Abort) |
| b | no_handler | ;0x00000014: |
|
| b | irq_handler | ;0x00000018: | IRQ (IRQ) |
| b | fiq_handler | ;0x0000001C: | FIQ (FIQ) |
LTORG
undef_handler HANDLER HandleUndef swi_handler HANDLER HandleSWI iabr_handler HANDLER HandlePabort dabr_handler HANDLER HandleDabort no_handler HANDLER HandleReserved irq_handler HANDLER HandleIRQ fiq_handler HANDLER HandleFIQ
;=============================
; 复位时运行的主程序
;=============================
reset_handler
;Set the cpu to SVC32 mode mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr_cxsf,r0
;Turn off watchdog ldr r0,=WTCON
ldr r1,=0x0
str r1,[r0]
;Disable all the first level interrupts ldr r0,=INTMSK
ldr r1,=0xffffffff str r1,[r0]
;Disable all the second level interrupts ldr r0,=INTSUBMSK
ldr r1,=0x7ff
str r1,[r0]
;Configure MPLL ldr r0,=MPLLCON
ldr r1,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV) ;Fin=12MHz,Fout=200MHz
str r1,[r0]
;Set FCLK:HCLK:PCLK = 1:2:4 ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
;Set memory control registers ldr r0,=SMRDATA
|
| ldr | r1,=BWSCON |
| add | r2, r0, #52 ;End address of SMRDATA | |
| 0 |
|
|
|
| ldr | r3, [r0], #4 |
|
| str | r3, [r1], #4 |
|
| cmp | r2, r0 |
|
| bne | %B0 |
;Initialize stacks bl InitStacks
;Setup IRQ handler
ldr r0,=HandleIRQ ;This routine is needed ldr r1,=IsrIRQ
str r1,[r0]
;Copy RW/ZI section into RAM
ldr r0, =|Image$$RO$$Limit|;Get pointer to ROM data ldr r1, =|Image$$RW$$Base| ;and RAM copy
ldr r3, =|Image$$ZI$$Base|
cmp r0, r1 ; Check that they are different beq %F2
1
cmp r1, r3 ; Copy init data
ldrcc r2, [r0], #4 ;--> LDRCC r2, [r0] + ADD r0, r0, #4 strcc r2, [r1], #4 ;--> STRCC r2, [r1] + ADD r1, r1, #4
bcc %B1
2
ldr r1, =|Image$$ZI$$Limit| ; Top of zero init segment mov r2, #0
3
cmp r3, r1 ; Zero init strcc r2, [r3], #4
bcc %B3
bl bdmain ;Jump to the main function
;Dead loop
1
nop
b %B1
;===============================================================================
; 初始中断处理程序
;===============================================================================
IsrIRQ
sub sp,sp,#4 ;reserved for PC stmfd sp!,{r8-r9}
ldr r9,=INTOFFSET
ldr r9,[r9]
ldr r8,=HandleEINT0 add r8,r8,r9,lsl #2 ldr r8,[r8]
str r8,[sp,#8] ldmfd sp!,{r8-r9,pc}
;===============================================================================
; 初始化各个模式下堆栈
;===============================================================================
InitStacks
mrs r0,cpsr
bic r0,r0,#MODEMASK
orr r1,r0,#UNDEFMODE|NOINT
msr cpsr_cxsf,r1 ;UndefMode ldr sp,=UndefStack
orr r1,r0,#ABORTMODE|NOINT
msr cpsr_cxsf,r1 ;AbortMode ldr sp,=AbortStack
orr r1,r0,#IRQMODE|NOINT
msr cpsr_cxsf,r1 ;IRQMode ldr sp,=IRQStack
orr r1,r0,#FIQMODE|NOINT
msr cpsr_cxsf,r1 ;FIQMode ldr sp,=FIQStack
bic r0,r0,#MODEMASK|NOINT orr r1,r0,#SVCMODE
msr cpsr_cxsf,r1 ;SVCMode ldr sp,=SVCStack
mov pc,lr ;Return the call routine LTORG
;===============================================================================
; 内存区控制寄存器值表; 你可根据需要修改 bdinit.h 文件, 下面代码不用做任何改动
;===============================================================================
SMRDATA DATA
DCD (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+( B7_BWSCON<<28))
DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) ;GCS0
DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) ;GCS1
DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) ;GCS2
DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) ;GCS3
DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) ;GCS4
DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) ;GCS5
DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) ;GCS6 DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) ;GCS7
DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
DCD 0x32 ;SCLK power saving mode, BANKSIZE 128M/128M DCD 0x30 ;MRSR6 CL=3clk
DCD 0x30 ;MRSR7 ALIGN
;===============================================================================
; 异常及中断向量表空间; 安装异常或中断处理程序在 bdisr.c 中,isr_setup()来完成.
;===============================================================================
AREA RamData, DATA, READWRITE
^ _ISR_STARTADDRESS ;表示下面数据区从_ISR_STARTADDRESS 指定的位置开始 HandleReset # 4
HandleUndef # 4
HandleSWI # 4
| HandlePabort | # | 4 |
| HandleDabort | # | 4 |
| HandleReserved | # | 4 |
| HandleIRQ | # | 4 |
| HandleFIQ | # | 4 |
;=============================
; The Interrupt table
;=============================
| HandleEINT0 | # | 4 |
| HandleEINT1 | # | 4 |
| HandleEINT2 | # | 4 |
| HandleEINT3 | # | 4 |
| HandleEINT4_7 | # | 4 |
| HandleEINT8_23 | # | 4 |
| HandleRSV6 | # | 4 |
| HandleBATFLT | # | 4 |
| HandleTICK | # | 4 |
| HandleWDT | # | 4 |
| HandleTIMER0 | # | 4 |
| HandleTIMER1 | # | 4 |
| HandleTIMER2 | # | 4 |
| HandleTIMER3 | # | 4 |
| HandleTIMER4 | # | 4 |
| HandleUART2 | # | 4 |
| HandleLCD | # | 4 |
| HandleDMA0 | # | 4 |
| HandleDMA1 | # | 4 |
| HandleDMA2 | # | 4 |
| HandleDMA3 | # | 4 |
| HandleMMC | # | 4 |
| HandleSPI0 | # | 4 |
| HandleUART1 | # | 4 |
| HandleRSV24 | # | 4 |
| HandleUSBD | # | 4 |
| HandleUSBH | # | 4 |
| HandleIIC | # | 4 |
| HandleUART0 | # | 4 |
| HandleSPI1 | # | 4 |
| HandleRTC | # | 4 |
| HandleADC | # | 4 |
END